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RT5509 Datenblatt(PDF) 35 Page - Richtek Technology Corporation

Teilenummer RT5509
Bauteilbeschribung  Speaker Amplifier with Speaker Protection
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Hersteller  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT5509 Datenblatt(HTML) 35 Page - Richtek Technology Corporation

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RT5509
Copyright © 2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation
DS5509-00
August
2017
www.richtek.com
35
ADDR Byte
Bits
R/W
Name
Description
Default
0x25
1
7:6
R/W
Reserved
5:0
R/W
PSM_THR1
PSM IPEAK value setting :
When 6-bit IDAC1 < PSM_THR1,
PSM mode is enabled if PSM_EN
and DCM_EN is on.
The actual
IPEAK is calculated as following:
IPEAK to (IDAC1(6-bit) * 0.625e-3
*12.2 * 50 /6.1)
– (slope_comp *
(1-VBAT * effi / VBST))
6’b000000
0x26
1
7:4
R/W
3
R
OC_EV
OC event happens
2
R
OT_EV
OT event happens
1
R/W
OCP_EN
Over-current protection enable :
0 : disable
1 : enable
1
0
R/W
OTP_EN
Over-temperature protection
enable :
0 : disable
1 : enable
1
0x2B
1
7
R/W
Reserved
6:0
R/W
CC_MAX
IDAC1 peak value
6’b000000
0x2C
1
7
R/W
Reserved
6:0
R/W
OCP_CURR
IDAC1 6-bit ocp enable level
6’b0
0x2D
2
15:12
Reversed
11
RC
INT_LEAK_SPK
Speaker air leak interrupt
0
10
R
INT_flagResDmg
Similar as 0x02 flagResDmg, but
this bit CAN’T be cleared by read,
and only can be clear by write 0 to
corresponding bit in register 0x02
0
9
R
INT_flagFreqDmg
Similar as 0x02 flagFreqDmg,but
this bit CAN’T be cleared by read,
and only can be clear by write 0 to
corresponding bit in register 0x02h
0
8
RC
INT_STB_BCK
BCK stable interrupt
0
7
RC
INT_LCK_PLL
PLL lock interrupt
0
6
RC
INT_OC_BST_P
Predicted boost converter
over-current interrupt
0
5
RC
INT_UV_VBAT
VBAT under-voltage interrupt
0
4
RC
INT_OV_PVDD
PVDD over-voltage interrupt
0
3
RC
INT_OC_AMP_P
Amplifier PMOS over-current
interrupt
0
2
RC
INT_OC_AMP_N
Amplifier NMOS over-current
interrupt
0
1
RC
INT_OC_BST
Boost converter over-current
interrupt
0
0
RC
INT_OT
Boost temperature interrupt
0


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