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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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AD9695-625EBZ Datenblatt(PDF) 11 Page - Analog Devices |
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AD9695-625EBZ Datenblatt(HTML) 11 Page - Analog Devices |
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11 / 136 page  AD9695 Data Sheet Rev. 0 | Page 10 of 135 SWITCHING SPECIFICATIONS AVDD1 = 0.95 V, AVDD1_SR = 0.95 V, AVDD2 = 1.8 V, AVDD3 = 2.5 V, DVDD = 0.95 V, DRVDD1 = 0.95 V, DRVDD2 = 1.8 V, SPIVDD = 1.8 V, clock divider = 2, default input full scale, 0.5 V internal reference, AIN = −1.0 dBFS, default SPI settings, and sample rate = 625 MSPS (AD9695-625 speed grade), sample rate = 1300 MSPS (AD9695-1300 speed grade), DCS on (AD9695-1300 speedgrade), DCS off (AD9695-625 speed grade), unless otherwise noted. Minimum and maximum specifications are guaranteed for the full operating junction temperature (TJ) range of −40°C to +105°C. Typical specifications represent performance at TJ = 35°C (TA = 25°C for the AD9695-625 speed grade) and TJ = 40°C (TA = 25°C for the AD9695-1300 speed grade). Table 5. Parameter 1300 MSPS 625 MSPS Min Typ Max Min Typ Max Unit CLOCK Clock Rate (at CLK+/CLK− Pins) 0.24 1.28 0.24 1.28 GHz Maximum Sample Rate1 1400 640 MSPS Minimum Sample Rate2 240 240 MSPS Clock Pulse Width3 High 156.25 156.25 ps Low 156.25 156.25 ps OUTPUT PARAMETERS Unit Interval (UI)4 62.5 76.9 62.5 160 ps Rise Time (tR) (20% to 80% into 100 Ω Load) 28 28 ps Fall Time (tF) (20% to 80% into 100 Ω Load) 28 28 ps Phase-Locked Loop (PLL) Lock Time 5 5 ms Data Rate per Channel (NRZ)5 1.6875 13 16 1.6875 6.25 16 Gbps LATENCY6 Pipeline Latency 56 56 Clock cycles Fast Detect Latency 26 26 Clock cycles Wake-Up Time7 Standby 400 400 us Power-Down 15 15 ms APERTURE Aperture Delay (tA) 192 159.5 ps Aperture Uncertainty (Jitter, tJ) 43 49.2 fs rms Out of Range Recovery Time 1 1 Clock cycles 1 The maximum sample rate is the clock rate after the divider. 2 The minimum sample rate operates at 240 MSPS. See SPI Register 0x011A to reduce the threshold of the clock detect circuit. 3 Clock duty stabilizer (DCS) on. See SPI Register 0x011C and 0x011E to enable DCS. 4 Baud rate = 1/UI. A subset of this range can be supported. 5 Default L = 4. This number can change based on the sample rate and decimation ratio. 6 No DDCs used. L = 4, M = 2, and F = 1. 7 Wake-up time is defined as the time required to return to normal operation from power-down mode. |
Ähnliche Teilenummer - AD9695-625EBZ |
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Ähnliche Beschreibung - AD9695-625EBZ |
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