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AD9234BCPZRL7-500 Datenblatt(PDF) 3 Page - Analog Devices

Teilenummer AD9234BCPZRL7-500
Bauteilbeschribung  Dual Analog-to-Digital Converter
Download  67 Pages
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9234BCPZRL7-500 Datenblatt(HTML) 3 Page - Analog Devices

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AD9234
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 3
General Description ......................................................................... 4
Specifications..................................................................................... 5
DC Specifications ......................................................................... 5
AC Specifications.......................................................................... 6
Digital Specifications ................................................................... 8
Switching Specifications .............................................................. 9
Timing Specifications .................................................................. 9
Absolute Maximum Ratings.......................................................... 11
Thermal Characteristics ............................................................ 11
ESD Caution................................................................................ 11
Pin Configuration and Function Descriptions........................... 12
Typical Performance Characteristics ........................................... 14
AD9234-1000.............................................................................. 14
AD9234-500 ................................................................................ 18
Equivalent Circuits......................................................................... 22
Theory of Operation ...................................................................... 24
ADC Architecture ...................................................................... 24
Analog Input Considerations.................................................... 24
Voltage Reference ....................................................................... 27
Clock Input Considerations...................................................... 28
Power-Down/Standby Mode .................................................... 29
Temperature Diode .................................................................... 29
ADC Overrange and Fast Detect.................................................. 30
ADC Overrange.......................................................................... 30
Fast Threshold Detection (FD_A and FD_B) ........................ 30
Signal Monitor ................................................................................ 31
Digital Downconverter (DDC)..................................................... 34
DDC General Description ........................................................ 34
Half-Band Filter.......................................................................... 35
DDC Gain Stage ......................................................................... 36
DDC Complex to Real Conversion ......................................... 36
Digital Outputs ............................................................................... 37
Introduction to the JESD204B Interface ................................. 37
JESD204B Overview .................................................................. 37
Functional Overview ................................................................. 38
JESD204B Link Establishment ................................................. 39
Physical Layer (Driver) Outputs .............................................. 41
Configuring the JESD204B Link.............................................. 43
Multichip Synchronization............................................................ 46
SYSREF± Setup/Hold Window Monitor................................. 48
Test Modes....................................................................................... 50
ADC Test Modes ........................................................................ 50
JESD204B Block Test Modes .................................................... 51
Serial Port Interface........................................................................ 53
Configuration Using the SPI..................................................... 53
Hardware Interface..................................................................... 53
SPI Accessible Features.............................................................. 53
Memory Map .................................................................................. 54
Reading the Memory Map Register Table............................... 54
Memory Map Register Table..................................................... 55
Applications Information .............................................................. 65
Power Supply Recommendations............................................. 65
Exposed Pad Thermal Heat Slug Recommendations............ 65
AVDD1_SR (Pin 57) and AGND (Pin 56 and Pin 60).............. 65
Outline Dimensions....................................................................... 66
Ordering Guide .......................................................................... 66
Rev. A | Page 2 of 66


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