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AD7190BRUZ Datenblatt(PDF) 1 Page - Analog Devices

Teilenummer AD7190BRUZ
Bauteilbeschribung  4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC
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Direct Link  http://www.analog.com
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4.8 kHz Ultralow Noise 24-Bit
Sigma-Delta ADC with PGA
Data Sheet
AD7190
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesfor itsuse,norfor anyinfringements ofpatents orother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2008–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
FEATURES
RMS noise: 8.5 nV @ 4.7 Hz (gain = 128)
16 noise free bits @ 2.4 kHz (gain = 128)
Up to 22.5 noise free bits (gain = 1)
Offset drift: 5 nV/°C
Gain drift: 1 ppm/°C
Specified drift over time
2 differential/4 pseudo differential input channels
Automatic channel sequencer
Programmable gain (1 to 128)
Output data rate: 4.7 Hz to 4.8 kHz
Internal or external clock
Simultaneous 50 Hz/60 Hz rejection
4 general-purpose digital outputs
Power supply
AVDD: 4.75 V to 5.25 V
DVDD: 2.7 V to 5.25 V
Current: 6 mA
Temperature range: –40°C to +105°C
Interface
3-wire serial
SPI, QSPI™, MICROWIRE™, and DSP compatible
Schmitt trigger on SCLK
Qualified for automotive applications
APPLICATIONS
Weigh scales
Strain gauge transducers
Pressure measurement
Temperature measurement
Chromatography
PLC/DCS analog input modules
Data acquisition
Medical and scientific instrumentation
GENERAL DESCRIPTION
The AD7190 is a low noise, complete analog front end for high
precision measurement applications. It contains a low noise,
24-bit sigma-delta (∑-Δ) analog-to-digital converter (ADC).
The on-chip low noise gain stage means that signals of small
amplitude can be interfaced directly to the ADC.
The device can be configured to have two differential inputs or
four pseudo differential inputs. The on-chip channel sequencer
allows several channels to be enabled, and the AD7190
sequentially converts on each enabled channel. This simplifies
communication with the part. The on-chip 4.92 MHz clock can
be used as the clock source to the ADC or, alternatively, an
external clock or crystal can be used. The output data rate from
the part can be varied from 4.7 Hz to 4.8 kHz.
The device has two digital filter options. The choice of filter
affects the rms noise/noise-free resolution at the programmed
output data rate, the settling time, and the 50 Hz/60 Hz
rejection. For applications that require all conversions to be
settled, the AD7190 includes a zero latency feature.
The part operates with 5 V analog power supply and a digital
power supply from 2.7 V to 5.25 V. It consumes a current of
6 mA. It is housed in a 24-lead TSSOP package.
FUNCTIONAL BLOCK DIAGRAM
MCLK1 MCLK2
P0/REFIN2(–) P1/REFIN2(+)
DVDD DGND REFIN1(+) REFIN1(–)
AIN1
AIN2
AIN3
AIN4
AINCOM
BPDSW
AGND
AD7190
REFERENCE
DETECT
SERIAL
INTERFACE
AND
CONTROL
LOGIC
TEMP
SENSOR
CLOCK
CIRCUITRY
DOUT/RDY
DIN
SCLK
CS
SYNC
P3
P2
AVDD
AGND
Σ-∆
ADC
PGA
MUX
Figure 1.


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