Datenblatt-Suchmaschine für elektronische Bauteile |
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PYTHON480 Datenblatt(PDF) 5 Page - ON Semiconductor |
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PYTHON480 Datenblatt(HTML) 5 Page - ON Semiconductor |
5 / 69 page PYTHON 480 www.onsemi.com 5 Table 5. ELECTRICAL SPECIFICATIONS (continued) Boldface limits apply for TJ = TMIN to TMAX, all other limits TJ = +30°C. (Notes 5, 6, 7, 8) Parameter Unit Max Typ Min Description Electrical Interface − LVDS tidc Input clock duty cycle when PLL used 45 50 55 % ratspi (= fin/fspi) 10−bit, PLL used (fin = 68 MHz) 6 10−bit, LVDS input used (fin = 340 MHz) 30 Electrical Interface − CMOS Cout Output load (only capacitive load) 10 pF Tr Output Rise Time 2.5 4.5 6.5 ns Tf Output Fall Time 2 3.5 5 ns fin Input clock rate 68 MHz tidc Input clock Duty Cycle 45 50 55 % ratspi (= fin/fspi) 10−bit (fin = 58 MHz) 6 todc CLK_OUT duty cycle 40 50 60 % tCD CLK_OUT to DOUTx (Note 11) 4 ns tCFH CLK_OUT to FRAME_VALID HIGH 4 ns tCFL CLK_OUT to FRAME_VALID LOW 4 ns tCLH CLK_OUT to LINE_VALID HIGH 4 ns tCLL CLK_OUT to LINE_VALID LOW 4 ns Frame Specifications − LVDS T_int Integration Time range 0.035 100 (Note 10) ms fps Frame rate at full resolution (800 x 600 pixels) 120 fps fps_roi Frame rate at 640 x 480 pixels resolution 180 fps fpix Pixel rate 68 Mpix/s Frame Specifications − CMOS fps Frame rate at full resolution (800 x 600 pixels) 120 fps Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. All parameters are characterized for DC conditions after thermal equilibrium is established. 6. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is recommended that normal precautions be taken to avoid application of any voltages higher than the maximum rated voltages to this high impedance circuit. 7. Minimum and maximum limits are guaranteed through test and design. 8. Refer to ACSPYTHON480 available at the Image Sensor Portal for detailed acceptance criteria specifications. 9. CMOS inputs are compatible with 3.3 V signal levels. 10.Longer integration times are possible, but with possible image quality trade−offs. 11. Data is clocked on the rising edge of the output clock. This can be changed to the falling edge by register 130[8] |
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