Datenblatt-Suchmaschine für elektronische Bauteile |
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CDCVF310PWR Datenblatt(PDF) 3 Page - Texas Instruments |
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CDCVF310PWR Datenblatt(HTML) 3 Page - Texas Instruments |
3 / 12 page www.ti.com CDCVF310 SCAS771A – AUGUST 2004 – REVISED AUGUST 2004 FUNCTION TABLE INPUT OUTPUT 1G 2G CLK 1Y[0:4] 2Y[0:4] L L ↓ L L H L ↓ CLK(1) L L H ↓ L CLK(1) H H ↓ CLK(1) CLK(1) (1) After detecting one negative edge on the CLK input, the output follows the input CLK if the control pin is held high. Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. 1G 11 I Output enable control for 1Y[0:4] outputs. This output enable is active-high, meaning the 1Y[0:4] clock outputs follow the input clock (CLK) if this pin is logic high. 2G 13 I Output enable control for 2Y[0:4] outputs. This output enable is active-high, meaning the 2Y[0:4] clock outputs follow the input clock (CLK) if this pin is logic high. 1Y[0:4] 3, 4, 5, 8, 9 O Buffered output clocks 2Y[0:4] 21, 20, 17, 16, 12 O Buffered output clocks CLK 24 I Input reference frequency GND 1, 6, 7, 18, 19 Ground VDD 2, 10, 14, 15, 22, 23 DC power supply, 2.3 V – 3.6 V 3 |
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